CY8C20246A chip reverse, chip decryption, chip crack, mcu code
extraction, mcu crack, mcu reverse.
Features
■ Wide operating range: 1.71 V to 5.5 V
■ Ultra low deep sleep current: 100 nA
Configurable capacitive sensing elements
7 μA per sensor at 500 ms scan rate
Supports SmartSense Auto-tuning
Supports a combination of CapSense buttons, sliders,
touchpads, touchscreens, and proximity sensors
SmartSense_EMC offers superior noise immunity for
applications with challenging conducted and radiated noise
conditions
■ Powerful Harvard-architecture processor
M8C CPU – Up to 4 MIPS with 24 MHz Internal clock, external
crystal resonator or clock signal
Low power at high speed
■ Temperature range: –40 °C to +85 °C
■ Flexible on-chip memory
Three program/data storage size options:
8 KB flash/1 KB SRAM
16 KB flash/2 KB SRAM
32 KB flash/2 KB SRAM
50,000 flash erase/write cycles
Partial flash updates
Flexible protection modes
In-system serial programming (ISSP)
■ Full-speed USB
12 Mbps USB 2.0 compliant
■ Precision, programmable clocking
Internal main oscillator (IMO): 6/12/24 MHz ± 5%
Internal low speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
Precision 32 kHz oscillator for optional external crystal
■ Programmable pin configurations
Up to 36 general-purpose I/Os (GPIOs) (depending on
package)
Dual mode GPIO: All GPIOs support digital I/O and analog
inputs
25-mA sink current on each GPIO
120 mA total sink current on all GPIOs
Pull-up, high Z, open-drain modes on all GPIOs
CMOS drive mode –5 mA source current on ports 0 and 1
and 1 mA on ports 2, 3, and 4
20 mA total source current on all GPIOs
■ Versatile analog system
Low-dropout voltage regulator for all analog resources
Common internal analog bus enabling capacitive sensing on
all pins
High power supply rejection ratio (PSRR) comparator
8 to 10-bit incremental analog-to-digital converter (ADC)
■ Additional system resources
I2C slave:
Selectable to 50 kHz, 100 kHz, or 400 kHz
SPI master and slave: Configurable 46.9 kHz to 12 MHz
Three 16-bit timers
Watchdog and sleep timers
Integrated supervisory circuit
Emulated E2PROM using flash memory
■ Complete development tools
Free development tool (PSoC Designer?)
Full-featured, in-circuit emulator (ICE) and programmer
Full-speed emulation
Complex breakpoint structure
128 KB trace memory
■ Versatile package options
16-pin 3 × 3 × 0.6 mm QFN
24-pin 4 × 4 × 0.6 mm QFN
32-pin 5 × 5 × 0.6 mm QFN
48-pin SSOP
48-pin 7 × 7 × 1.0 mm QFN
30-ball WLCSP
Friday, October 26, 2012
CY8C20246A-24LKXIT chip reverse
CY8C20246A-24LKXIT chip reverse, chip decryption, chip crack,
mcu code extraction, mcu crack, mcu reverse.
The PSoC family consists of on-chip controller devices, which
are designed to replace multiple traditional microcontroller
unit
(MCU)-based components with one, low cost single-chip
programmable component. A PSoC device includes
configurable analog and digital blocks, and programmable
interconnect. This architecture allows the user to create
customized peripheral configurations, to match the requirements
of each individual application. Additionally, a fast CPU, Flash
program memory, SRAM data memory, and configurable I/O are
included in a range of convenient pinouts.
The architecture for this device family, as shown in the Logic
Block Diagram on page 2, consists of three main areas:
■ The Core
■ CapSense Analog System
■ System Resources (including a full-speed USB port).
A common, versatile bus allows connection between I/O and the
analog system.
Each CY8C20X36A/46A/66A/96A/46AS/66AS PSoC device
includes a dedicated CapSense block that provides sensing and
scanning control circuitry for capacitive sensing applications.
Depending on the PSoC package, up to 36 GPIO are also
included. The GPIO provides access to the MCU and analog
mux.
mcu code extraction, mcu crack, mcu reverse.
The PSoC family consists of on-chip controller devices, which
are designed to replace multiple traditional microcontroller
unit
(MCU)-based components with one, low cost single-chip
programmable component. A PSoC device includes
configurable analog and digital blocks, and programmable
interconnect. This architecture allows the user to create
customized peripheral configurations, to match the requirements
of each individual application. Additionally, a fast CPU, Flash
program memory, SRAM data memory, and configurable I/O are
included in a range of convenient pinouts.
The architecture for this device family, as shown in the Logic
Block Diagram on page 2, consists of three main areas:
■ The Core
■ CapSense Analog System
■ System Resources (including a full-speed USB port).
A common, versatile bus allows connection between I/O and the
analog system.
Each CY8C20X36A/46A/66A/96A/46AS/66AS PSoC device
includes a dedicated CapSense block that provides sensing and
scanning control circuitry for capacitive sensing applications.
Depending on the PSoC package, up to 36 GPIO are also
included. The GPIO provides access to the MCU and analog
mux.
CY8C20246AS-24LKXI chip reverse
CY8C20246AS-24LKXI chip reverse, chip decryption, chip crack,
mcu code extraction, mcu crack, mcu reverse.
PSoC Designer? is the revolutionary integrated design
environment (IDE) that you can use to customize PSoC to meet
your specific application requirements. PSoC Designer software
accelerates system design and time to market. Develop your
applications using a library of precharacterized analog and
digital
peripherals (called user modules) in a drag-and-drop design
environment. Then, customize your design by leveraging the
dynamically generated application programming interface (API)
libraries of code. Finally, debug and test your designs with the
integrated debug environment, including in-circuit emulation and
standard software debug features. PSoC Designer includes:
■ Application editor graphical user interface (GUI) for device
and
user module configuration and dynamic reconfiguration
■ Extensive user module catalog
■ Integrated source-code editor (C and assembly)
■ Free C compiler with no size restrictions or time limits
■ Built-in debugger
■ In-circuit emulation
■ Built-in support for communication interfaces:
Hardware and software I2C slaves and masters
Full-speed USB 2.0
Up to four full-duplex universal asynchronous
receiver/transmitters (UARTs), SPI master and slave, and
wireless
PSoC Designer supports the entire library of PSoC 1 devices and
runs on Windows XP, Windows Vista, and Windows 7.
MC9S08XXX crack
MC9S08XXX crack:MC9S08 MC9S08AW MC9S08JM MC9S08 LC
MC9S08QD MC9S08AC16 MC9S08AC32 MC9S08AC60MC9S08DZ60 MC9S08DZ48
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S9S08AW16 S9S08AW8
CY8C20247-24LKXI chip reverse
CY8C20247-24LKXI chip reverse, chip decryption, chip crack, mcu
code extraction, mcu crack, mcu reverse.
Features
■ QuietZone? Controller
Patented Capacitive Sigma Delta PLUS (CSD PLUS?)
sensing algorithm for robust performance
High Sensitivity (0.1 pF) and best-in-class SNR performance
to support:
Ideal for proximity solutions
Overlay thickness of 15 mm for glass and 5 mm plastic
Superior noise immunity performance against conducted and
radiated noise and ultra low radiated emissions
Reliable and robust touch performance in noisy environments
Standardized user modules for overcoming noise
■ Low power CapSense
block with SmartSense? auto-tuning
Supports a combination of up to 31 buttons or 6 sliders,
proximity sensors
Low average power consumption - 28 ?A for each sensor at
runtime (wake from sleep and scan sensors every 125 ms)
SmartSense auto-tuning
Sets and maintains optimal sensor performance during
runtime
Eliminates system tuning during development and production
Compensates for variations in manufacturing process
■ Driven shield available on five GPIO pins
Max load of 100 pF at 3 MHz
Frequency range: 375 kHz to 3 MHz
Delivers best-in class water tolerant designs
Robust proximity sensing in the presence of metal objects
■ Powerful Harvard-architecture processor
M8C CPU with a maximum speed of 24 MHz
Operating range: 1.71 V to 5.5 V
Standby mode: 1.1 μA (typ)
Deep sleep: 0.1 μA (typ)
Temperature range: –40 °C to +85 °C
■ Flexible on-chip memory
8 KB flash, 1 KB SRAM
16 KB flash, 2 KB SRAM
32 KB flash, 2 KB SRAM
50,000 flash erase/write cycles
In-system programming capability
■ Four clock sources
Internal main oscillator (IMO): 6/12/24 MHz
Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
RC crystal oscillator
Clock input
■ Programmable pin configurations
Up to 32 general-purpose I/Os (GPIOs)
Dual mode GPIO
High sink current of 25 mA for each GPIO. Total 120 mA
maximum sink current per chip
5 mA source current on port 0 and 1 and 1 mA on port 2,3
and 4
Configurable internal pull-up, high-Z, and open drain modes
Selectable, regulated digital I/O on port 1
Configurable input threshold on port 1
■ Versatile analog mux
Common internal analog bus
Simultaneous connection of I/O
High power supply rejection ratio (PSRR) comparator
Low-dropout voltage regulator for all analog resources
■ Additional system resources
I2C slave:
Selectable to 50 kHz, 100 kHz, or 400 kHz
Selectable clock stretch or forced Nack mode
Implementation during sleep modes with less than 100 μA
I2C wake from sleep with hardware address validation
12 MHz SPI master and slave
Three 16-bit timers
Watchdog and sleep timers
Internal voltage reference
Integrated supervisory circuit
10-bit incremental analog-to-digital converter (ADC)
Two general-purpose high speed, low power analog comparators
■ Complete development tools
Free development tool (PSoC Designer?)
■ Package options
16-pin SOIC (150 mil)
16-pin QFN – 3 × 3 × 0.6 mm
24-pin QFN – 4 × 4 × 0.6 mm
32-pin QFN – 5 × 5 × 0.6 mm
48-pin QFN – 6 × 6 × 0.6 mm
30-ball WLCSP
code extraction, mcu crack, mcu reverse.
Features
■ QuietZone? Controller
Patented Capacitive Sigma Delta PLUS (CSD PLUS?)
sensing algorithm for robust performance
High Sensitivity (0.1 pF) and best-in-class SNR performance
to support:
Ideal for proximity solutions
Overlay thickness of 15 mm for glass and 5 mm plastic
Superior noise immunity performance against conducted and
radiated noise and ultra low radiated emissions
Reliable and robust touch performance in noisy environments
Standardized user modules for overcoming noise
■ Low power CapSense
block with SmartSense? auto-tuning
Supports a combination of up to 31 buttons or 6 sliders,
proximity sensors
Low average power consumption - 28 ?A for each sensor at
runtime (wake from sleep and scan sensors every 125 ms)
SmartSense auto-tuning
Sets and maintains optimal sensor performance during
runtime
Eliminates system tuning during development and production
Compensates for variations in manufacturing process
■ Driven shield available on five GPIO pins
Max load of 100 pF at 3 MHz
Frequency range: 375 kHz to 3 MHz
Delivers best-in class water tolerant designs
Robust proximity sensing in the presence of metal objects
■ Powerful Harvard-architecture processor
M8C CPU with a maximum speed of 24 MHz
Operating range: 1.71 V to 5.5 V
Standby mode: 1.1 μA (typ)
Deep sleep: 0.1 μA (typ)
Temperature range: –40 °C to +85 °C
■ Flexible on-chip memory
8 KB flash, 1 KB SRAM
16 KB flash, 2 KB SRAM
32 KB flash, 2 KB SRAM
50,000 flash erase/write cycles
In-system programming capability
■ Four clock sources
Internal main oscillator (IMO): 6/12/24 MHz
Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
RC crystal oscillator
Clock input
■ Programmable pin configurations
Up to 32 general-purpose I/Os (GPIOs)
Dual mode GPIO
High sink current of 25 mA for each GPIO. Total 120 mA
maximum sink current per chip
5 mA source current on port 0 and 1 and 1 mA on port 2,3
and 4
Configurable internal pull-up, high-Z, and open drain modes
Selectable, regulated digital I/O on port 1
Configurable input threshold on port 1
■ Versatile analog mux
Common internal analog bus
Simultaneous connection of I/O
High power supply rejection ratio (PSRR) comparator
Low-dropout voltage regulator for all analog resources
■ Additional system resources
I2C slave:
Selectable to 50 kHz, 100 kHz, or 400 kHz
Selectable clock stretch or forced Nack mode
Implementation during sleep modes with less than 100 μA
I2C wake from sleep with hardware address validation
12 MHz SPI master and slave
Three 16-bit timers
Watchdog and sleep timers
Internal voltage reference
Integrated supervisory circuit
10-bit incremental analog-to-digital converter (ADC)
Two general-purpose high speed, low power analog comparators
■ Complete development tools
Free development tool (PSoC Designer?)
■ Package options
16-pin SOIC (150 mil)
16-pin QFN – 3 × 3 × 0.6 mm
24-pin QFN – 4 × 4 × 0.6 mm
32-pin QFN – 5 × 5 × 0.6 mm
48-pin QFN – 6 × 6 × 0.6 mm
30-ball WLCSP
Tuesday, October 16, 2012
CY7C025AV-20AXC chip decryption
CY7C025AV-20AXC chip decryption,cypress MCU code extraction, PCB
cloning .
Features
True dual-ported memory cells which enable simultaneous
access of the same memory location
4, 8 or 16 K × 16 organization
(CY7C024AV/025AV/026AV)
0.35 micron CMOS for optimum speed and power
High speed access: 20 ns and 25 ns
Low operating power
Active: ICC = 115 mA (typical)
Standby: ISB3
= 10 ?A (typical)
Fully asynchronous operation
Automatic power down
Expandable data bus to 32 bits or more using Master and Slave
chip select when using more than one device
On chip arbitration logic
Semaphores included to permit software handshaking
between ports
INT flag for port-to-port communication
Separate upper byte and lower byte control
Pin select for Master or Slave (M/S)
Commercial and industrial temperature ranges
Available in 100-pin Pb-free TQFP and 100-pin TQFP
cloning .
Features
True dual-ported memory cells which enable simultaneous
access of the same memory location
4, 8 or 16 K × 16 organization
(CY7C024AV/025AV/026AV)
0.35 micron CMOS for optimum speed and power
High speed access: 20 ns and 25 ns
Low operating power
Active: ICC = 115 mA (typical)
Standby: ISB3
= 10 ?A (typical)
Fully asynchronous operation
Automatic power down
Expandable data bus to 32 bits or more using Master and Slave
chip select when using more than one device
On chip arbitration logic
Semaphores included to permit software handshaking
between ports
INT flag for port-to-port communication
Separate upper byte and lower byte control
Pin select for Master or Slave (M/S)
Commercial and industrial temperature ranges
Available in 100-pin Pb-free TQFP and 100-pin TQFP
Wednesday, October 10, 2012
M32C/85 Renesas series chip decryption
M32C/85 Renesas series chip decryption, code extraction,
programm reading.
The M32C/85 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
programm reading.
The M32C/85 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
M32C/87 code extraction
M32C/87 Renesas series chip decryption, code extraction,
programm reading.
The M32C/87 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
programm reading.
The M32C/87 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
M32C/87 Key Features
Key Features:
16-bit Multifunction Timer (Timer A and B, incl. 3-phase
inverter motorcontrol function): 11 channels
Clock Synchronous / Asynchronous Serial Interface: 7 channels*
10-bit A/D Converter: 34 channels*
8-bit D/A Converter: 2
DMAC: 4 channels
DMAC II: Can be activated by all peripheral function interrupt
factors
Intelligent I/O
Time Measurement (Input Capture) Function: 16-bit x 8 channels
Waveform Generating (Output Compare) Function: 16-bit x 16
channels*
Communication Function
2-phase Pulse Signal Processing (2-phase encoder input)
CAN (2.0B)
M32C/87: 2 channels, M32C/87A: 1 channel, M32C/87B: Not
Available
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Clock Generation Circuits: Main Clock Generation Circuit, Sub
ClockGeneration Circuit, On-chip Oscillator, PLL Synthesizer
Oscillation Stop Detection Function
Power Supply Voltage Detection
ROM Correction Function
I/O Ports: 123*
External Interrupt Pins: 14*
Data Flash: 4KB (Flash Memory Version only)
*: Spec of 144-pin version.
16-bit Multifunction Timer (Timer A and B, incl. 3-phase
inverter motorcontrol function): 11 channels
Clock Synchronous / Asynchronous Serial Interface: 7 channels*
10-bit A/D Converter: 34 channels*
8-bit D/A Converter: 2
DMAC: 4 channels
DMAC II: Can be activated by all peripheral function interrupt
factors
Intelligent I/O
Time Measurement (Input Capture) Function: 16-bit x 8 channels
Waveform Generating (Output Compare) Function: 16-bit x 16
channels*
Communication Function
2-phase Pulse Signal Processing (2-phase encoder input)
CAN (2.0B)
M32C/87: 2 channels, M32C/87A: 1 channel, M32C/87B: Not
Available
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Clock Generation Circuits: Main Clock Generation Circuit, Sub
ClockGeneration Circuit, On-chip Oscillator, PLL Synthesizer
Oscillation Stop Detection Function
Power Supply Voltage Detection
ROM Correction Function
I/O Ports: 123*
External Interrupt Pins: 14*
Data Flash: 4KB (Flash Memory Version only)
*: Spec of 144-pin version.
M30873FHGP Key Applications
Key Applications:
Audio, Cameras, Office Equipment, Communication/Portable
Devices.
M30873FHGP M30873MH-XXXGP M30875FHGP M30875MH-XXXGP M30876FJGP
M30876MJ-XXXFP M30876MJ-XXXGP M30878FJGP M30878MJ-XXXGP
M30879FKGP M30879FLFP M30879FLGP M3087BFKGP M3087BFLGP
M30873FHAGP M30873MHA-XXXGP M30875FHAGP M30875MHA-XXXGP
M30876FJAGP M30876MJA-XXXFP M30876MJA-XXXGP M30878FJAGP
M30878MJA-XXXGP M30879FKAGP M30879FLAFP M30879FLAGP M3087BFKAGP
M3087BFLAGP M30873FHBGP M30873MHB-XXXGP M30875FHBGP M30875MHB-
XXXGP M30876FJBGP M30876MJB-XXXFP M30876MJB-XXXGP M30878FJBGP
M30878MJB-XXXGP M30879FKBGP M30879FLBFP M30879FLBGP M3087BFKBGP
M3087BFLBGP
Audio, Cameras, Office Equipment, Communication/Portable
Devices.
M30873FHGP M30873MH-XXXGP M30875FHGP M30875MH-XXXGP M30876FJGP
M30876MJ-XXXFP M30876MJ-XXXGP M30878FJGP M30878MJ-XXXGP
M30879FKGP M30879FLFP M30879FLGP M3087BFKGP M3087BFLGP
M30873FHAGP M30873MHA-XXXGP M30875FHAGP M30875MHA-XXXGP
M30876FJAGP M30876MJA-XXXFP M30876MJA-XXXGP M30878FJAGP
M30878MJA-XXXGP M30879FKAGP M30879FLAFP M30879FLAGP M3087BFKAGP
M3087BFLAGP M30873FHBGP M30873MHB-XXXGP M30875FHBGP M30875MHB-
XXXGP M30876FJBGP M30876MJB-XXXFP M30876MJB-XXXGP M30878FJBGP
M30878MJB-XXXGP M30879FKBGP M30879FLBFP M30879FLBGP M3087BFKBGP
M3087BFLBGP
M32C/87 Renesas series chip decryption
M32C/87 Renesas series chip decryption, code extraction,
programm reading.
The M32C/87 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
Key Features:
16-bit Multifunction Timer (Timer A and B, incl. 3-phase
inverter motorcontrol function): 11 channels
Clock Synchronous / Asynchronous Serial Interface: 7 channels*
10-bit A/D Converter: 34 channels*
8-bit D/A Converter: 2
DMAC: 4 channels
DMAC II: Can be activated by all peripheral function interrupt
factors
Intelligent I/O
Time Measurement (Input Capture) Function: 16-bit x 8 channels
Waveform Generating (Output Compare) Function: 16-bit x 16
channels*
Communication Function
2-phase Pulse Signal Processing (2-phase encoder input)
CAN (2.0B)
M32C/87: 2 channels, M32C/87A: 1 channel, M32C/87B: Not
Available
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Clock Generation Circuits: Main Clock Generation Circuit, Sub
ClockGeneration Circuit, On-chip Oscillator, PLL Synthesizer
Oscillation Stop Detection Function
Power Supply Voltage Detection
ROM Correction Function
I/O Ports: 123*
External Interrupt Pins: 14*
Data Flash: 4KB (Flash Memory Version only)
*: Spec of 144-pin version.
Key Applications:
Audio, Cameras, Office Equipment, Communication/Portable
Devices.
M30873FHGP M30873MH-XXXGP M30875FHGP M30875MH-XXXGP M30876FJGP
M30876MJ-XXXFP M30876MJ-XXXGP M30878FJGP M30878MJ-XXXGP
M30879FKGP M30879FLFP M30879FLGP M3087BFKGP M3087BFLGP
M30873FHAGP M30873MHA-XXXGP M30875FHAGP M30875MHA-XXXGP
M30876FJAGP M30876MJA-XXXFP M30876MJA-XXXGP M30878FJAGP
M30878MJA-XXXGP M30879FKAGP M30879FLAFP M30879FLAGP M3087BFKAGP
M3087BFLAGP M30873FHBGP M30873MHB-XXXGP M30875FHBGP M30875MHB-
XXXGP M30876FJBGP M30876MJB-XXXFP M30876MJB-XXXGP M30878FJBGP
M30878MJB-XXXGP M30879FKBGP M30879FLBFP M30879FLBGP M3087BFKBGP
M3087BFLBGP
programm reading.
The M32C/87 is based on the M32C/80 CPU Core and has 16MB of
address space.Maximum operating frequency is 32MHz. Mask ROM and
Flash Memory Versions areavailable. Internal Flash Memory is
programmable on a single power source.
Key Features:
16-bit Multifunction Timer (Timer A and B, incl. 3-phase
inverter motorcontrol function): 11 channels
Clock Synchronous / Asynchronous Serial Interface: 7 channels*
10-bit A/D Converter: 34 channels*
8-bit D/A Converter: 2
DMAC: 4 channels
DMAC II: Can be activated by all peripheral function interrupt
factors
Intelligent I/O
Time Measurement (Input Capture) Function: 16-bit x 8 channels
Waveform Generating (Output Compare) Function: 16-bit x 16
channels*
Communication Function
2-phase Pulse Signal Processing (2-phase encoder input)
CAN (2.0B)
M32C/87: 2 channels, M32C/87A: 1 channel, M32C/87B: Not
Available
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Clock Generation Circuits: Main Clock Generation Circuit, Sub
ClockGeneration Circuit, On-chip Oscillator, PLL Synthesizer
Oscillation Stop Detection Function
Power Supply Voltage Detection
ROM Correction Function
I/O Ports: 123*
External Interrupt Pins: 14*
Data Flash: 4KB (Flash Memory Version only)
*: Spec of 144-pin version.
Key Applications:
Audio, Cameras, Office Equipment, Communication/Portable
Devices.
M30873FHGP M30873MH-XXXGP M30875FHGP M30875MH-XXXGP M30876FJGP
M30876MJ-XXXFP M30876MJ-XXXGP M30878FJGP M30878MJ-XXXGP
M30879FKGP M30879FLFP M30879FLGP M3087BFKGP M3087BFLGP
M30873FHAGP M30873MHA-XXXGP M30875FHAGP M30875MHA-XXXGP
M30876FJAGP M30876MJA-XXXFP M30876MJA-XXXGP M30878FJAGP
M30878MJA-XXXGP M30879FKAGP M30879FLAFP M30879FLAGP M3087BFKAGP
M3087BFLAGP M30873FHBGP M30873MHB-XXXGP M30875FHBGP M30875MHB-
XXXGP M30876FJBGP M30876MJB-XXXFP M30876MJB-XXXGP M30878FJBGP
M30878MJB-XXXGP M30879FKBGP M30879FLBFP M30879FLBGP M3087BFKBGP
M3087BFLBGP
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